The architecture and placement algorithm for a uni-directional routing based 3D FPGA

Keyphrases

• Placement Algorithm 100%
• Routing Architecture 100%
• 3D FPGA 100%
• Directional Routing 100%
• Three-dimensional (3D) 75%
• Channel Width 50%
• Vertical Channel 50%
• Design Trends 25%
• Performance Improvement 25%
• Proposed Architecture 25%
• Delay Reduction 25%
• Architectural Design 25%
• Simulated Annealing Algorithm 25%
• Xilinx 25%
• Simulated Annealing Method 25%
• Area Saving 25%
• Signal Propagation 25%
• Width Reduction 25%
• Adaptive Simulated Annealing 25%
• Planar Channel 25%
• Altera 25%
• Area-delay Product 25%

Computer Science

• Simulated Annealing 100%
• Placement Algorithm 100%
• Performance Improvement 50%
• Architecture Design 50%
• Simulated Annealing Approach 50%
• Signal Propagation 50%