Hybrid CMOS-Memristive Convolutional computation for on-chip learning

Nanoscale memristive devices have elicited widespread interests in implementing compact and energy-efficient neuromorphic computing systems. In this paper, a learning system of hybrid CMOS-memristive convolutional computation for on-chip learning is presented. Two different methods to achieve the convolutional computation on-chip are provided. One method is to utilize a one memristor (1M)-based array to realize both image convolution and recognition. Another method is to perform the convolutional computation on-chip through a hybrid CMOS-memristive learning circuits. In addition, a modified back propagation (BP) algorithm suitable for the proposed memristive neural networks is applied to perform image convolution and recognition. Another highlight of the proposed method is that the presented hybrid CMOS-memristive neural networks can be expanded to deep convolutional neural networks (DNN).